BEGIN:VCALENDAR PRODID:-//Microsoft Corporation//Outlook 16.0 MIMEDIR//EN VERSION:2.0 METHOD:PUBLISH X-MS-OLK-FORCEINSPECTOROPEN:TRUE BEGIN:VTIMEZONE TZID:Mountain Standard Time BEGIN:STANDARD DTSTART:16011104T020000 RRULE:FREQ=YEARLY;BYDAY=1SU;BYMONTH=11 TZOFFSETFROM:-0600 TZOFFSETTO:-0700 END:STANDARD BEGIN:DAYLIGHT DTSTART:16010311T020000 RRULE:FREQ=YEARLY;BYDAY=2SU;BYMONTH=3 TZOFFSETFROM:-0700 TZOFFSETTO:-0600 END:DAYLIGHT END:VTIMEZONE BEGIN:VEVENT CLASS:PUBLIC CREATED:20260727T194456Z DESCRIPTION:2026 AMD Xilinx Security Working Group (SWG)\n \nLongmont\, C O Agenda\n \nPreliminary Agenda / Subject to Modification\n \n3100 Log ic Drive\, Summit Retreat\, Building B\, 2nd Floor\, Longmont\, CO 80503\n \nTuesday\, October 6\, 2026\n \nAll Presentations in Summit Retreat Room\n \nTopic\nTime\n \nCheck In and Continental Breakfast\n7:00 - 8: 00 am\n \nWelcome and Introductions\n8:00 - 8:30 am\n \nAMD-Xilinx Sec ure Processor Status Update\n8:30 - 9:00 am\n \nAMD-Xilinx Secure Proces sor Boot Introduction\n9:00 - 10:00 am\n \nBREAK\n10:00 - 10:15 am\n \ nHow to Design In Versal AI Edge and Prime Series Gen 2 with a Path to the AMD-Xilinx Secure Processor \n10:15 - 11:15 am\n \nFORGE - Secure Devel opment Lifecycle Update\n11:15 am - 12:15 pm\n \nLUNCH\n12:15 - 1:15 pm\ n \nAMD x86 Product Decoder Ring: Understanding the EPYC™ and Ryzen™ for Embedded Platforms\n1:15 - 2:15 pm\n \nAMD x86 Security Feature Dee p Dive: Ryzen™ and EPYC™ Security Architectures Compared\n2:15 - 2:45 pm\n \nBREAK\n2:45 - 3:00 pm\n \nAMD x86 Secure Boot Deep Dive: Silico n Root of Trust and Early Boot Security\n3:00 - 4:00 pm\n \nIntroduction to PCIe Security\n4:00 - 5:00pm\n \nEvening Social and Partner Demonstr ations\n5:00 - 8:00 pm\n \n \n \n \n \n2026 AMD Xilinx Security Working Group (SWG)\n \nLongmont\, CO Agenda\n \nPreliminary Agenda / Subject to Modification\n \n3100 Logic Drive\, Summit Retreat\, Buil ding B\, 2nd Floor\, Longmont\, CO 80503\n \nWednesday\, October 7\, 20 26\n \n Continental Breakfast 7:00 - 8: 00 am\n \n Summit Retreat : Attacking Semiconductor Devices 8:00 - 9:30 am\n \n Summit Retreat : ACE Configuration Editor - An overview 9:30 - 10:15 am\n \nBreak 10:15 - 10:30 am\n \nTrack 1 : Summit Retreat Room Topics \nTime\nTrack 2 : Silverthorne Room Topics\ n \nSpartan UltraScale+ Secure Boot Walkthrough Lab\n10:30 - 11:30 am\n Versal AI Edge and Prime Series Gen 2 Secure Boot Lab\n \nSpartan Ultra Scale+ Run-Time Cryptography Lab\n11:30 am - 12:30 pm\nDDR Memory Encrypti on Lab for Versal Adaptive SoCs\n \nLunch\n12:30 - 1:30 pm\nLunch\n \nSpartan UltraScale+ Security Update and Platform Firmware Resiliency Ref erence Design\n1:30 - 2:30 pm\nHW/SW Assurance + CRA Update\n \nGuidanc e on Essential Security Resources/ Information\n2:30 - 3:30 pm\nVersal AI Edge and Prime Series Gen 2 ASU Update and Benchmarking\n \nBreak 3:30 - 3:45 pm\n \n Summit Retreat : Security Roadmap Update 3:45 - 4:45 pm\n \n \nThursday\, October 8\, 2026\n \nClassified Session\n \nT hursday\, October 8\, 2026\, 7:00am Check-In\, 3:00pm Conclusion (Lunch pr ovided)\n \nLockheed-Martin\, Boulder - TBD Conference Room\n \n6304 Spine Road - Boulder\, CO 80301\n \n \n \n DTEND;TZID="Mountain Standard Time":20261008T170000 DTSTAMP:20260727T194456Z DTSTART;TZID="Mountain Standard Time":20261006T080000 LAST-MODIFIED:20260727T194456Z LOCATION:3100 Logic Dr (3100 Logic Dr\, Longmont\, Colorado 80503) PRIORITY:5 SEQUENCE:0 SUMMARY;LANGUAGE=en-us:Security Working Group 2026 - Longmont TRANSP:OPAQUE UID:040000008200E00074C5B7101A82E00800000000D0CFC4B6C41DDD01000000000000000 010000000B9B64DC8FD507242B7A8D72C955E52CE X-ALT-DESC;FMTTYPE=text/html:
< td width=519 colspan=7 rowspan=3 style='width:389.35pt\;border:solid windo wtext 1.0pt\;border-top:none\;mso-border-top-alt:solid windowtext .5pt\;ms o-border-alt:solid windowtext .5pt\;background:#DAE9F8\;padding:0in 5.4pt 0in 5.4pt\;height:18.75pt'>

Evening Social and Partner Demonstrations

< td style='height:18.75pt\;border:none' width=0 height=25>< td width=15 style='width:11.1pt\;padding:0in 5.4pt 0in 5.4pt\;height:23.25 pt'>< ![if !supportMisalignedRows]>< td width=699 nowrap colspan=10 style='width:524.55pt\;border:solid windowt ext 1.0pt\;border-top:none\;mso-border-top-alt:solid windowtext .5pt\;mso- border-alt:solid windowtext .5pt\;background:#BDD7EE\;padding:0in 5.4pt 0i n 5.4pt\;height:15.75pt'>

Break 10:15 - 10:30 am

< td style='mso-cell-special:placeholder\;border:none\;padding:0in 0in 0in 0 in' width=67 colspan=2>

 \;

< td style='mso-cell-special:placeholder\;border:none\;padding:0in 0in 0in 0 in' width=67 colspan=2>

 \;

2026 AMD Xilinx Security Working Group (SWG)< /o:p>

&nbs p\;

Longmont\, CO Age nda

 \;

Preliminary Agenda / Subject to Modification< o:p>

 \;

3100 Logic Drive\, Summ it Retreat\, Building B\, 2nd Floor\, Longmont\, CO 80503

 \;

Tuesday\ , October 6\, 2026

< p class='MsoNormal'> \;

All Presentations in Summit Retreat Room

 \;

Topic

Time

 \;

Check In and Continental Breakfast

7:00 - 8:00 am

 \;

Welcome and Introdu ctions

8:00 - 8:30 am< /span>

 \;

AMD -Xilinx Secure Processor Status Update

8:30 - 9 :00 am

 \;

AMD-Xilinx Secure Processor Boot Introduction

9:00 - 10:00 am

 \;

BREAK

10:00 - 10:15 am

 \;

How to Design In Versal AI Edge and Prime Series Gen 2 with a Path to the AMD-Xilinx Secure Processor

10:15 - 11:15 am

 \;

FORGE - Secure Development Lifecycle Update

11:15 am - 12:15 pm

 \;

LUNCH

< /td>

< span style='font-size:11.0pt\;font-family:"Calibri"\,sans-serif\;mso-farea st-font-family:"Times New Roman"\;color:black\;mso-font-kerning:0pt\;mso-l igatures:none'>12:15 - 1:15 pm

 \;

AMD x86 Product Decoder Ring: Understandi ng the EPYC™\; and Ryzen™\; for Embedded Platforms

1:15 - 2:15 pm

 \;

AMD x86 Security Feature Deep Div e: Ryzen™\; and EPYC™\; Security Architectures Compared

2:15 - 2:45 pm

 \;

BREAK

2:45 - 3:00 pm

 \;

AMD x86 Secure Boot Deep Dive: Sili con Root of Trust and Early Boot Security

3:00 - 4:00 pm

 \;

Introduction to PCIe Security

< /td>

< span style='font-size:11.0pt\;font-family:"Calibri"\,sans-serif\;mso-farea st-font-family:"Times New Roman"\;color:black\;mso-font-kerning:0pt\;mso-l igatures:none'>4:00 - 5:00pm

 \;

5:00 - 8:00 pm

 \;

 \;

 \;

 \;

 \;

2026 AM D Xilinx Security Working Group (SWG)

< /td>

 \;

Longmont\, CO Agenda

 \;

Preliminary Agenda / Subject to Modification

 \;

3100 Logic Drive\, Summit Retreat\, Building B\, 2nd Floor\, Longmont\, CO 80503

 \;

Wednesday\, October 7\, 2026

 \;

 \; \; \; Continental Breakfast  \; \; \; \; \; \;& nbsp\; \; \; \; \; \; \; \; \; \;  \; \; \; \; \; \; \; \; \; \; \;&n bsp\; \; \; \; \; \; \; \; \; \; \ ; \; \; \; \; \; \; \; \; \; \;&nb sp\; \; \; \; \; \; \; \; \; \; \;  \; \; \; \; \; \; \; \; \; \;&nbs p\; \; \; \; \; \; \; \; \; \; \;& nbsp\; \; \; \; \; \; \; \; \; \;  \; \; \; \; \; \; \; \; \;  \; \; \; \;7:00 - 8:00 am

 \;

 \; \; \; Summit Retreat : Attacking Semiconductor Devices \; \; \; \; \;& nbsp\; \; \; \; \; \; \; \; \; \;  \; \; \; \; \; \; \; \; \; \; \;&n bsp\; \; \; \; \; \; \; \; \; \; \ ; \; \; \; \; \; \; \;  \; \; \;  \; \; \;8:00 - 9:30 am

 \;

 \; \; \; Summit Retreat : ACE Configuration Editor - An overview \; \; \; \; \; \; \; \;&nb sp\; \; \; \; \; \; \; \; \; \; \;  \; \; \; \; \; \; \; \; \; \;&nbs p\; \; \; \; \; \; \; \; \; \; 9:30 - 10:15 am

 \;

Track 1 : Summit Retreat Room Topics

Time

Track 2 : Silverthorne Room Topics

 \;

Spartan UltraScale+ Secure Boot Walkthrough Lab

10:30 - 11:30 am

Versal AI Edge and Prime Series Gen 2 Secure Boot Lab

 \;

Spartan UltraScale+ Run-Time Cryptography Lab

11:30 am - 12:30 pm

DDR Memory Encryption Lab for Versal Adaptive SoCs

 \;

< b> Lunch

12:30 - 1:30 pm

Lunch

 \;

Spartan UltraScale+ Security Update and Platform Firmware Resiliency Reference Design< /o:p>

1:30 - 2:30 pm

HW/SW Assurance + CRA Update

 \;

Guidance on Essential Security Resources/ Information

2:30 - 3:30 pm

V ersal AI Edge and Prime Series Gen 2 ASU Update and Benchmarking

 \;

< p class=MsoNormal align=center style='text-align:center'>Break 3:30 - 3:4 5 pm

 \;

 \; \;& nbsp\; Summit Retreat : Security Roadmap Update \; \; \; \; \; \; \; \; \;  \; \; \; \; \; \; \; \; \; \;&nbs p\; \; \; \; \; \; \; \; \; \; \;& nbsp\; \; \; \; \; \; \; \; \; \;  \; \; \; \; \; \; \; \; \; \; \;&n bsp\; \; \; \; \; \; \; \; \; \; \ ; \; \; 3:45 - 4:45 pm

< /td>

 \;

< /td>

Thursday\, October 8\, 2026

Classified Session

 \;

Thursday\, October 8\, 2026\, 7:00am Check -In\, 3:00pm Conclusion (Lunch provided)

 \;

Lockheed-Martin\, Boulder - TBD Conference Room< /o:p>

 \;

6304 Spine Roa d - Boulder\, CO 80301

 \;

 \;

 \;

X-MICROSOFT-CDO-BUSYSTATUS:BUSY X-MICROSOFT-CDO-IMPORTANCE:1 X-MICROSOFT-DISALLOW-COUNTER:FALSE X-MS-OLK-AUTOFILLLOCATION:FALSE X-MS-OLK-CONFTYPE:0 BEGIN:VALARM TRIGGER:-PT15M ACTION:DISPLAY DESCRIPTION:Reminder END:VALARM END:VEVENT END:VCALENDAR